System-on-Chip Environment: SCE Version 2.2.0 Beta; Tutorial | ||
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In this tutorial, we performed the SW synthesis task after RTL synthesis of HW. Note that these two tasks are orthogonal and may be done in any order. We showed C code generation for the behaviors mapped to SW component. This is a useful feature of SCE, since we can generate C code which can be compiled onto any processor to generate assembly. The code can then used for an instruction set simulator to run on a cycle-by-cycle basis with the RTL HW. All these built in features of SCE allow the designer to move across abstraction levels even for parts of a design. The flexibility and design capablity that is thus provided to the designer is enormous.