Defines | |
#define | TIMEN0 0x0001 |
#define | TIMEN1 0x0002 |
#define | TIMEN2 0x0004 |
#define | TIMEN3 0x0008 |
#define | TIMEN4 0x0010 |
#define | TIMEN5 0x0020 |
#define | TIMEN6 0x0040 |
#define | TIMEN7 0x0080 |
#define | TIMDIS0 TIMEN0 |
#define | TIMDIS1 TIMEN1 |
#define | TIMDIS2 TIMEN2 |
#define | TIMDIS3 TIMEN3 |
#define | TIMDIS4 TIMEN4 |
#define | TIMDIS5 TIMEN5 |
#define | TIMDIS6 TIMEN6 |
#define | TIMDIS7 TIMEN7 |
#define | TIMIL0 0x00000001 |
#define | TIMIL1 0x00000002 |
#define | TIMIL2 0x00000004 |
#define | TIMIL3 0x00000008 |
#define | TOVF_ERR0 0x00000010 |
#define | TOVF_ERR1 0x00000020 |
#define | TOVF_ERR2 0x00000040 |
#define | TOVF_ERR3 0x00000080 |
#define | TRUN0 0x00001000 |
#define | TRUN1 0x00002000 |
#define | TRUN2 0x00004000 |
#define | TRUN3 0x00008000 |
#define | TIMIL4 0x00010000 |
#define | TIMIL5 0x00020000 |
#define | TIMIL6 0x00040000 |
#define | TIMIL7 0x00080000 |
#define | TOVF_ERR4 0x00100000 |
#define | TOVF_ERR5 0x00200000 |
#define | TOVF_ERR6 0x00400000 |
#define | TOVF_ERR7 0x00800000 |
#define | TRUN4 0x10000000 |
#define | TRUN5 0x20000000 |
#define | TRUN6 0x40000000 |
#define | TRUN7 0x80000000 |
#define | TOVL_ERR0 TOVF_ERR0 |
#define | TOVL_ERR1 TOVF_ERR1 |
#define | TOVL_ERR2 TOVF_ERR2 |
#define | TOVL_ERR3 TOVF_ERR3 |
#define | TOVL_ERR4 TOVF_ERR4 |
#define | TOVL_ERR5 TOVF_ERR5 |
#define | TOVL_ERR6 TOVF_ERR6 |
#define | TOVL_ERR7 TOVF_ERR7 |
#define | PWM_OUT 0x0001 |
#define | WDTH_CAP 0x0002 |
#define | EXT_CLK 0x0003 |
#define | PULSE_HI 0x0004 |
#define | PERIOD_CNT 0x0008 |
#define | IRQ_ENA 0x0010 |
#define | TIN_SEL 0x0020 |
#define | OUT_DIS 0x0040 |
#define | CLK_SEL 0x0080 |
#define | TOGGLE_HI 0x0100 |
#define | EMU_RUN 0x0200 |
#define | ERR_TYP 0xC000 |
#define CLK_SEL 0x0080 |
#define EMU_RUN 0x0200 |
#define ERR_TYP 0xC000 |
#define EXT_CLK 0x0003 |
#define IRQ_ENA 0x0010 |
#define OUT_DIS 0x0040 |
#define PERIOD_CNT 0x0008 |
#define PULSE_HI 0x0004 |
#define PWM_OUT 0x0001 |
#define TIMDIS0 TIMEN0 |
#define TIMDIS1 TIMEN1 |
#define TIMDIS2 TIMEN2 |
#define TIMDIS3 TIMEN3 |
#define TIMDIS4 TIMEN4 |
#define TIMDIS5 TIMEN5 |
#define TIMDIS6 TIMEN6 |
#define TIMDIS7 TIMEN7 |
#define TIMEN0 0x0001 |
#define TIMEN1 0x0002 |
#define TIMEN2 0x0004 |
#define TIMEN3 0x0008 |
#define TIMEN4 0x0010 |
#define TIMEN5 0x0020 |
#define TIMEN6 0x0040 |
#define TIMEN7 0x0080 |
#define TIMIL0 0x00000001 |
#define TIMIL1 0x00000002 |
#define TIMIL2 0x00000004 |
#define TIMIL3 0x00000008 |
#define TIMIL4 0x00010000 |
#define TIMIL5 0x00020000 |
#define TIMIL6 0x00040000 |
#define TIMIL7 0x00080000 |
#define TIN_SEL 0x0020 |
#define TOGGLE_HI 0x0100 |
#define TOVF_ERR0 0x00000010 |
#define TOVF_ERR1 0x00000020 |
#define TOVF_ERR2 0x00000040 |
#define TOVF_ERR3 0x00000080 |
#define TOVF_ERR4 0x00100000 |
#define TOVF_ERR5 0x00200000 |
#define TOVF_ERR6 0x00400000 |
#define TOVF_ERR7 0x00800000 |
#define TOVL_ERR0 TOVF_ERR0 |
#define TOVL_ERR1 TOVF_ERR1 |
#define TOVL_ERR2 TOVF_ERR2 |
#define TOVL_ERR3 TOVF_ERR3 |
#define TOVL_ERR4 TOVF_ERR4 |
#define TOVL_ERR5 TOVF_ERR5 |
#define TOVL_ERR6 TOVF_ERR6 |
#define TOVL_ERR7 TOVF_ERR7 |
#define TRUN0 0x00001000 |
#define TRUN1 0x00002000 |
#define TRUN2 0x00004000 |
#define TRUN3 0x00008000 |
#define TRUN4 0x10000000 |
#define TRUN5 0x20000000 |
#define TRUN6 0x40000000 |
#define TRUN7 0x80000000 |
#define WDTH_CAP 0x0002 |