Defines | |
#define | DF 0x0001 |
#define | PLL_OFF 0x0002 |
#define | STOPCK 0x0008 |
#define | PDWN 0x0020 |
#define | IN_DELAY 0x0040 |
#define | OUT_DELAY 0x0080 |
#define | BYPASS 0x0100 |
#define | MSEL 0x7E00 |
#define | SPORT_HYST 0x8000 |
#define | SSEL 0x000F |
#define | CSEL 0x0030 |
#define | CSEL_DIV1 0x0000 |
#define | CSEL_DIV2 0x0010 |
#define | CSEL_DIV4 0x0020 |
#define | CSEL_DIV8 0x0030 |
#define | CCLK_DIV1 CSEL_DIV1 |
#define | CCLK_DIV2 CSEL_DIV2 |
#define | CCLK_DIV4 CSEL_DIV4 |
#define | CCLK_DIV8 CSEL_DIV8 |
#define | ACTIVE_PLLENABLED 0x0001 |
#define | FULL_ON 0x0002 |
#define | ACTIVE_PLLDISABLED 0x0004 |
#define | DEEP_SLEEP 0x0008 |
#define | SLEEP 0x0010 |
#define | PLL_LOCKED 0x0020 |
#define | CORE_IDLE 0x0040 |
#define | VSTAT 0x0080 |
#define | FREQ_MASK 0x0003 |
#define | FREQ_HIBERNATE 0x0000 |
#define | FREQ_333 0x0001 |
#define | FREQ_667 0x0002 |
#define | FREQ_1000 0x0003 |
#define | GAIN_MASK 0x000C |
#define | GAIN_5 0x0000 |
#define | GAIN_10 0x0004 |
#define | GAIN_20 0x0008 |
#define | GAIN_50 0x000C |
#define | VLEV_MASK 0x00F0 |
#define | VLEV_085 0x0060 |
#define | VLEV_090 0x0070 |
#define | VLEV_095 0x0080 |
#define | VLEV_100 0x0090 |
#define | VLEV_105 0x00A0 |
#define | VLEV_110 0x00B0 |
#define | VLEV_115 0x00C0 |
#define | VLEV_120 0x00D0 |
#define | VLEV_125 0x00E0 |
#define | VLEV_130 0x00F0 |
#define | WAKE 0x0100 |
#define | CANWE 0x0200 |
#define | PHYWE 0x0400 |
#define | GPWE 0x0400 |
#define | MXVRWE 0x0400 |
#define | USBWE 0x0800 |
#define | KPADWE 0x1000 |
#define | ROTWE 0x2000 |
#define | CLKBUFOE 0x4000 |
#define | CKELOW 0x8000 |
#define ACTIVE_PLLDISABLED 0x0004 |
#define ACTIVE_PLLENABLED 0x0001 |
#define BYPASS 0x0100 |
#define CANWE 0x0200 |
#define CCLK_DIV1 CSEL_DIV1 |
#define CCLK_DIV2 CSEL_DIV2 |
#define CCLK_DIV4 CSEL_DIV4 |
#define CCLK_DIV8 CSEL_DIV8 |
#define CKELOW 0x8000 |
#define CLKBUFOE 0x4000 |
#define CORE_IDLE 0x0040 |
#define CSEL 0x0030 |
#define CSEL_DIV1 0x0000 |
#define CSEL_DIV2 0x0010 |
#define CSEL_DIV4 0x0020 |
#define CSEL_DIV8 0x0030 |
#define DEEP_SLEEP 0x0008 |
#define DF 0x0001 |
#define FREQ_1000 0x0003 |
#define FREQ_333 0x0001 |
#define FREQ_667 0x0002 |
#define FREQ_HIBERNATE 0x0000 |
#define FREQ_MASK 0x0003 |
#define FULL_ON 0x0002 |
#define GAIN_10 0x0004 |
#define GAIN_20 0x0008 |
#define GAIN_5 0x0000 |
#define GAIN_50 0x000C |
#define GAIN_MASK 0x000C |
#define GPWE 0x0400 |
#define IN_DELAY 0x0040 |
#define KPADWE 0x1000 |
#define MSEL 0x7E00 |
#define MXVRWE 0x0400 |
#define OUT_DELAY 0x0080 |
#define PDWN 0x0020 |
#define PHYWE 0x0400 |
#define PLL_LOCKED 0x0020 |
#define PLL_OFF 0x0002 |
#define ROTWE 0x2000 |
#define SLEEP 0x0010 |
#define SPORT_HYST 0x8000 |
#define SSEL 0x000F |
#define STOPCK 0x0008 |
#define USBWE 0x0800 |
#define VLEV_085 0x0060 |
#define VLEV_090 0x0070 |
#define VLEV_095 0x0080 |
#define VLEV_100 0x0090 |
#define VLEV_105 0x00A0 |
#define VLEV_110 0x00B0 |
#define VLEV_115 0x00C0 |
#define VLEV_120 0x00D0 |
#define VLEV_125 0x00E0 |
#define VLEV_130 0x00F0 |
#define VLEV_MASK 0x00F0 |
#define VSTAT 0x0080 |
#define WAKE 0x0100 |