Defines | |
#define | CFIFO_ERR 0x0001 |
#define | YFIFO_ERR 0x0002 |
#define | LTERR_OVR 0x0004 |
#define | LTERR_UNDR 0x0008 |
#define | FTERR_OVR 0x0010 |
#define | FTERR_UNDR 0x0020 |
#define | ERR_NCOR 0x0040 |
#define | DMA1URQ 0x0080 |
#define | DMA0URQ 0x0100 |
#define | ERR_DET 0x4000 |
#define | FLD 0x8000 |
#define | EPPI_EN 0x00000001 |
#define | EPPI_DIR 0x00000002 |
#define | XFR_TYPE 0x0000000c |
#define | FS_CFG 0x00000030 |
#define | FLD_SEL 0x00000040 |
#define | ITU_TYPE 0x00000080 |
#define | BLANKGEN 0x00000100 |
#define | ICLKGEN 0x00000200 |
#define | IFSGEN 0x00000400 |
#define | POLC 0x00001800 |
#define | POLS 0x00006000 |
#define | DLENGTH 0x00038000 |
#define | SKIP_EN 0x00040000 |
#define | SKIP_EO 0x00080000 |
#define | PACKEN 0x00100000 |
#define | SWAPEN 0x00200000 |
#define | SIGN_EXT 0x00400000 |
#define | SPLT_EVEN_ODD 0x00800000 |
#define | SUBSPLT_ODD 0x01000000 |
#define | DMACFG 0x02000000 |
#define | RGB_FMT_EN 0x04000000 |
#define | FIFO_RWM 0x18000000 |
#define | FIFO_UWM 0x60000000 |
#define | DLEN_8 (0 << 15) |
#define | DLEN_10 (1 << 15) |
#define | DLEN_12 (2 << 15) |
#define | DLEN_14 (3 << 15) |
#define | DLEN_16 (4 << 15) |
#define | DLEN_18 (5 << 15) |
#define | DLEN_24 (6 << 15) |
#define | F1VB_BD 0x000000ff |
#define | F1VB_AD 0x0000ff00 |
#define | F2VB_BD 0x00ff0000 |
#define | F2VB_AD 0xff000000 |
#define | F1_ACT 0x0000ffff |
#define | F2_ACT 0xffff0000 |
#define | LOW_ODD 0x000000ff |
#define | HIGH_ODD 0x0000ff00 |
#define | LOW_EVEN 0x00ff0000 |
#define | HIGH_EVEN 0xff000000 |
#define BLANKGEN 0x00000100 |
#define CFIFO_ERR 0x0001 |
#define DLEN_10 (1 << 15) |
#define DLEN_12 (2 << 15) |
#define DLEN_14 (3 << 15) |
#define DLEN_16 (4 << 15) |
#define DLEN_18 (5 << 15) |
#define DLEN_24 (6 << 15) |
#define DLEN_8 (0 << 15) |
#define DLENGTH 0x00038000 |
#define DMA0URQ 0x0100 |
#define DMA1URQ 0x0080 |
#define DMACFG 0x02000000 |
#define EPPI_DIR 0x00000002 |
#define EPPI_EN 0x00000001 |
#define ERR_DET 0x4000 |
#define ERR_NCOR 0x0040 |
#define F1_ACT 0x0000ffff |
#define F1VB_AD 0x0000ff00 |
#define F1VB_BD 0x000000ff |
#define F2_ACT 0xffff0000 |
#define F2VB_AD 0xff000000 |
#define F2VB_BD 0x00ff0000 |
#define FIFO_RWM 0x18000000 |
#define FIFO_UWM 0x60000000 |
#define FLD 0x8000 |
#define FLD_SEL 0x00000040 |
#define FS_CFG 0x00000030 |
#define FTERR_OVR 0x0010 |
#define FTERR_UNDR 0x0020 |
#define HIGH_EVEN 0xff000000 |
#define HIGH_ODD 0x0000ff00 |
#define ICLKGEN 0x00000200 |
#define IFSGEN 0x00000400 |
#define ITU_TYPE 0x00000080 |
#define LOW_EVEN 0x00ff0000 |
#define LOW_ODD 0x000000ff |
#define LTERR_OVR 0x0004 |
#define LTERR_UNDR 0x0008 |
#define PACKEN 0x00100000 |
#define POLC 0x00001800 |
#define POLS 0x00006000 |
#define RGB_FMT_EN 0x04000000 |
#define SIGN_EXT 0x00400000 |
#define SKIP_EN 0x00040000 |
#define SKIP_EO 0x00080000 |
#define SPLT_EVEN_ODD 0x00800000 |
#define SUBSPLT_ODD 0x01000000 |
#define SWAPEN 0x00200000 |
#define XFR_TYPE 0x0000000c |
#define YFIFO_ERR 0x0002 |