Defines | |
#define | MK_BMSK_(x) (1 << x) |
#define | EVT_EMU_P 0 |
#define | EVT_RP 1 |
#define | EVT_NMI_P 2 |
#define | EVT_EVX_P 3 |
#define | EVT_IRPTEN_P 4 |
#define | EVT_IVHW_P 5 |
#define | EVT_IVTMR_P 6 |
#define | EVT_IVG7_P 7 |
#define | EVT_IVG8_P 8 |
#define | EVT_IVG9_P 9 |
#define | EVT_IVG10_P 10 |
#define | EVT_IVG11_P 11 |
#define | EVT_IVG12_P 12 |
#define | EVT_IVG13_P 13 |
#define | EVT_IVG14_P 14 |
#define | EVT_IVG15_P 15 |
#define | EVT_EMU MK_BMSK_(EVT_EMU_P ) |
#define | EVT_RST MK_BMSK_(EVT_RP ) |
#define | EVT_NMI MK_BMSK_(EVT_NMI_P ) |
#define | EVT_EVX MK_BMSK_(EVT_EVX_P ) |
#define | EVT_IRPTEN MK_BMSK_(EVT_IRPTEN_P) |
#define | EVT_IVHW MK_BMSK_(EVT_IVHW_P ) |
#define | EVT_IVTMR MK_BMSK_(EVT_IVTMR_P ) |
#define | EVT_IVG7 MK_BMSK_(EVT_IVG7_P ) |
#define | EVT_IVG8 MK_BMSK_(EVT_IVG8_P ) |
#define | EVT_IVG9 MK_BMSK_(EVT_IVG9_P ) |
#define | EVT_IVG10 MK_BMSK_(EVT_IVG10_P ) |
#define | EVT_IVG11 MK_BMSK_(EVT_IVG11_P ) |
#define | EVT_IVG12 MK_BMSK_(EVT_IVG12_P ) |
#define | EVT_IVG13 MK_BMSK_(EVT_IVG13_P ) |
#define | EVT_IVG14 MK_BMSK_(EVT_IVG14_P ) |
#define | EVT_IVG15 MK_BMSK_(EVT_IVG15_P ) |
#define | EXCAUSE_P 0 |
#define | EXCAUSE0_P 0 |
#define | EXCAUSE1_P 1 |
#define | EXCAUSE2_P 2 |
#define | EXCAUSE3_P 3 |
#define | EXCAUSE4_P 4 |
#define | EXCAUSE5_P 5 |
#define | IDLE_REQ_P 12 |
#define | SFTRESET_P 13 |
#define | HWERRCAUSE_P 14 |
#define | HWERRCAUSE0_P 14 |
#define | HWERRCAUSE1_P 15 |
#define | HWERRCAUSE2_P 16 |
#define | HWERRCAUSE3_P 17 |
#define | HWERRCAUSE4_P 18 |
#define | HWERRCAUSE5_P 19 |
#define | HWERRCAUSE6_P 20 |
#define | HWERRCAUSE7_P 21 |
#define | EXCAUSE |
#define | SFTRESET ( MK_BMSK_(SFTRESET_P) ) |
#define | HWERRCAUSE |
#define | SYSTEM_RESET 0x0007 |
#define | DOUBLE_FAULT 0x0008 |
#define | RESET_DOUBLE 0x2000 |
#define | RESET_WDOG 0x4000 |
#define | RESET_SOFTWARE 0x8000 |
#define | SSSTEP 0x00000001 |
#define | CCEN 0x00000002 |
#define | SNEN 0x00000004 |
#define CCEN 0x00000002 |
#define DOUBLE_FAULT 0x0008 |
#define EVT_EMU MK_BMSK_(EVT_EMU_P ) |
#define EVT_EMU_P 0 |
#define EVT_EVX MK_BMSK_(EVT_EVX_P ) |
#define EVT_EVX_P 3 |
#define EVT_IRPTEN MK_BMSK_(EVT_IRPTEN_P) |
#define EVT_IRPTEN_P 4 |
#define EVT_IVG10 MK_BMSK_(EVT_IVG10_P ) |
#define EVT_IVG10_P 10 |
#define EVT_IVG11 MK_BMSK_(EVT_IVG11_P ) |
#define EVT_IVG11_P 11 |
#define EVT_IVG12 MK_BMSK_(EVT_IVG12_P ) |
#define EVT_IVG12_P 12 |
#define EVT_IVG13 MK_BMSK_(EVT_IVG13_P ) |
#define EVT_IVG13_P 13 |
#define EVT_IVG14 MK_BMSK_(EVT_IVG14_P ) |
#define EVT_IVG14_P 14 |
#define EVT_IVG15 MK_BMSK_(EVT_IVG15_P ) |
#define EVT_IVG15_P 15 |
#define EVT_IVG7 MK_BMSK_(EVT_IVG7_P ) |
#define EVT_IVG7_P 7 |
#define EVT_IVG8 MK_BMSK_(EVT_IVG8_P ) |
#define EVT_IVG8_P 8 |
#define EVT_IVG9 MK_BMSK_(EVT_IVG9_P ) |
#define EVT_IVG9_P 9 |
#define EVT_IVHW MK_BMSK_(EVT_IVHW_P ) |
#define EVT_IVHW_P 5 |
#define EVT_IVTMR MK_BMSK_(EVT_IVTMR_P ) |
#define EVT_IVTMR_P 6 |
#define EVT_NMI MK_BMSK_(EVT_NMI_P ) |
#define EVT_NMI_P 2 |
#define EVT_RP 1 |
#define EVT_RST MK_BMSK_(EVT_RP ) |
#define EXCAUSE |
Value:
( MK_BMSK_(EXCAUSE0_P) | \ MK_BMSK_(EXCAUSE1_P) | \ MK_BMSK_(EXCAUSE2_P) | \ MK_BMSK_(EXCAUSE3_P) | \ MK_BMSK_(EXCAUSE4_P) | \ MK_BMSK_(EXCAUSE5_P) )
#define EXCAUSE0_P 0 |
#define EXCAUSE1_P 1 |
#define EXCAUSE2_P 2 |
#define EXCAUSE3_P 3 |
#define EXCAUSE4_P 4 |
#define EXCAUSE5_P 5 |
#define EXCAUSE_P 0 |
#define HWERRCAUSE |
Value:
( MK_BMSK_(HWERRCAUSE0_P) | \ MK_BMSK_(HWERRCAUSE1_P) | \ MK_BMSK_(HWERRCAUSE2_P) | \ MK_BMSK_(HWERRCAUSE3_P) | \ MK_BMSK_(HWERRCAUSE4_P) )
#define HWERRCAUSE0_P 14 |
#define HWERRCAUSE1_P 15 |
#define HWERRCAUSE2_P 16 |
#define HWERRCAUSE3_P 17 |
#define HWERRCAUSE4_P 18 |
#define HWERRCAUSE5_P 19 |
#define HWERRCAUSE6_P 20 |
#define HWERRCAUSE7_P 21 |
#define HWERRCAUSE_P 14 |
#define IDLE_REQ_P 12 |
#define MK_BMSK_ | ( | x | ) | (1 << x) |
#define RESET_DOUBLE 0x2000 |
#define RESET_SOFTWARE 0x8000 |
#define RESET_WDOG 0x4000 |
#define SFTRESET ( MK_BMSK_(SFTRESET_P) ) |
#define SFTRESET_P 13 |
#define SNEN 0x00000004 |
#define SSSTEP 0x00000001 |
#define SYSTEM_RESET 0x0007 |